Demo 5.1: Designing a Seven-Segment Decoder
Everything so far has been practice. The maps were chosen to teach something, the puzzles had one output, and the 1s were where they were because it made a point. This demonstation is a job. A four-bit BCD digit arrives and seven segments have to light in the right pattern, and you have to design the internal logic. The specification is a display that shows the correct number, and getting from there to a gate diagram is the exercise.
It is also the first design with more than one output. That changes less than it sounds like it does and more than students expect: a seven-segment decoder has no single Boolean expression, it has seven, one per segment, and you design each of them separately from the same truth table. The four inputs are shared. Nothing else is.
The don’t cares come back too, and they matter more here than in any exercise. Four bits hold sixteen values, a decimal digit needs ten, and the six left over cannot occur. That gives you six free cells on every one of the seven maps.
The segment names
Section titled “The segment names”Segments are numbered D0 to D6, positioned like this:
D6 D5 D4 D3 D2 D1 D0So D6 is the top bar, D3 is the middle bar, D0 is the bottom bar, and the four verticals are D5 top left, D4 top right, D2 bottom left, D1 bottom right. The input bits are I3 down to I0, with I3 the most significant.
How to use it
Section titled “How to use it”The chip is the specification and nothing else — you will see the actual chip in Laboratory 4. Four input pins on the left, seven output pins on the right, and dotted lines carrying each output to a segment of the display module beside it. Toggle the input bits and watch the digit appear. Try the codes above 1001: the display is still there, it is simply dark.
The truth table is the same information written out, all sixteen rows, with the six impossible ones starred. Click a row to send it to the display. Then click one of the D headings at the top of a segment column. That is the move the whole design depends on: reading down a column instead of across a row.
Design it gives you a Karnaugh map per segment. D0 is worked through one group at a time and you can step back and replay it. The other six are yours. You are told whether each answer is a cheapest one, and since several segments have more than one cheapest answer, yours does not have to match anybody else’s.
Designing a Seven-Segment Decoder
Four bits of BCD in, seven segments out. One specification, seven Karnaugh maps.
Walkthrough
Section titled “Walkthrough”Step 1: Look at the problem before solving it
Section titled “Step 1: Look at the problem before solving it”Open The chip and count up from 0000 to 1001, watching the display.
Then keep going. At 1010 every segment goes dark and you are told the code is not valid BCD. Six codes do that. Nothing in the specification says what the display should do for them, because nothing upstream will ever produce them, and that silence is about to be worth a great deal.
Now watch the seven output pins as you count, rather than the display. They change independently, and each one runs off down its own dotted line to a segment. There is no single output here to write an expression for, which is what makes this different from everything you have designed so far.
Step 2: Read down a column
Section titled “Step 2: Read down a column”Open The truth table. The heavy vertical rule down the middle is the line the whole design turns on: four input columns to its left, seven output columns to its right. Click the D2 heading.
D2 is the bottom-left segment, and the column tells you it is on for digits 0, 2, 6 and 8 and off for the other six. That is a four-variable Boolean function, complete and unambiguous, and it has nothing to do with the other six columns.
Click D1 and look at that column instead. On for every digit except 2. Also a four-variable function, and a much easier one.
This is the shift that makes the design tractable. A row of the table tells you what a digit looks like, which is what the customer asked for. A column tells you when one segment has to be lit, which is the only thing you can build a gate for. Seven columns, seven design problems.
Step 3: Watch D0 being built
Section titled “Step 3: Watch D0 being built”Open Design it. It starts on D0, which is worked through for you.
Press Show the first group and keep pressing. Five groups appear one at a time, each with the workings underneath showing which variables held still and which took both values.
Group one is worth stopping on. Every cell in the bottom half of the map is either a 1 or a star, so all eight of them form a single group, and three of the four variables drop out. That term is just I3, and it exists only because six of those eight cells are codes that cannot happen. Without the don’t cares there would be two 1s down there and the term would be far more expensive.
Group three wraps top to bottom. Group four reuses digit 2, which is by then already inside two other groups. Group five is a group of two costing three literals, because digit 5 has only one starred neighbour and there is nothing better available. Not every group is a triumph.
Step back through it with Back, and press Replay and do it again. You will need the pattern for the next six.
Step 4: Do the other six
Section titled “Step 4: Do the other six”Work through D1 to D6 in whatever order you like.
Start with D1, which is the easiest by a distance. It is on for every digit except 2, so there is one 0 on the whole map surrounded by 1s and stars. Three groups of eight, three single literals.
Then D2, which is the smallest at two terms. Then D3 to D6, which are all four terms or fewer.
Read the workings for every group before you add it. The habit is the point: which variables did not change, and therefore which ones survive into the term.
When a segment is finished you are told whether it is a cheapest answer, and if it is not, what the cheapest costs. That check is worth trusting. It comes from searching every possible grouping of the 1s and the stars, not from comparing against a stored answer, which is also why a different arrangement costing the same will be accepted.
Step 5: Look at what you have built
Section titled “Step 5: Look at what you have built”Finish all seven and the complete decoder appears: seven equations, one per segment.
Read the note underneath. Across the seven outputs there are twenty-five product terms, but only fifteen of them are different from one another. Several terms turn up in three or four different segments. A real decoder builds each of those once and wires its output to every segment that needs it, which is why the chip inside a 7447 is a good deal smaller than seven independent designs would be.
That gate sharing is the last idea in this sequence and it follows directly from the work you have just done. You cannot see which terms repeat until you have minimised all seven, and you cannot minimise all seven by hand in a reasonable time without the map.
Check your understanding
Section titled “Check your understanding”Why does a seven-segment decoder need seven Karnaugh maps rather than one?
Six of the sixteen input codes cannot occur. What does that buy the designer?
Match each step of the design to what it produces
Across the seven finished expressions there are twenty-five product terms but only fifteen distinct ones. Why does that matter?
You finish a segment and the demonstration says the answer is correct but not the cheapest. What does that mean for the circuit?
Wrap-up
Section titled “Wrap-up”This was the point of the last four demonstrations. Boolean algebra, De Morgan’s theorems and Karnaugh maps are not ends in themselves; they are what gets you from a sentence about a display to a diagram someone can build.
Four things to take from it:
- A multi-output part is several designs sharing input pins. Split the truth table into columns and treat each column as its own problem.
- Impossible input combinations are an asset. Six of them here turn several segments from awkward into trivial, and the D0 walkthrough opens with a group of eight that is mostly stars.
- Correct and cheapest are different properties, and only one of them shows up in testing.
- Once all the outputs are minimised, look across them for terms that repeat. Building each shared term once is free and it is how real parts are put together.
The tools you now have handle any combinational circuit: something whose output depends only on what its inputs are doing right now. Adders, comparators, multiplexers and decoders all yield to exactly this treatment.
What they cannot describe is a circuit that remembers. The moment an output depends on what happened earlier as well as on the present inputs, truth tables and Karnaugh maps stop being enough, and a different set of ideas is needed. That is sequential logic, and it is where this goes next.
© 2026 Derek Molloy, Dublin City University. All rights reserved.